Currently, Google Meet automatically adjusts your lighting for meetings on the web, helping to improve your video quality in underexposed environments. We’re now expanding this functionality to meetings taken on Google Meet Series One Desk 27 and Acer Chromebase for Meetings devices. If these devices detect that your video appears underexposed, it will adjust the brightness to improve how you appear in the meeting. We plan to expand this functionality to larger meeting room devices in the future.
Getting started
Admins: There is no admin control for this feature.
End users: The feature will trigger automatically when Meet detects that the users’ video is underexposed. Users can disable the feature in the settings menu for the active meeting. Visit the Help Center to learn more about turning on automatic video lighting adjustment.
Google Maps has its roots deep in the Asia Pacific region. Back in 2004, two Aussies and two Danes in Sydney created the technology that underpinned Google Maps, a servi…
Editor’s note: Penny Christie is an artist based out of Sydney, Australia. She’s part of the Local Guides program on Google Maps, made up of millions around the world wh…
Android is an open source operating system that is freely available to port to many devices and architectures. As such it supports many different device types and CPU architectures. We’re excited to be adding a new one to that list - RISC-V.
RISC-V is a free and open instruction set architecture (ISA), bringing the same spirit of industry-wide collaboration and innovation that we see in software around open source to the hardware ecosystem. Invented 10 years ago at the University of California, Berkeley, RISC-V has seen rapid adoption in embedded and microcontroller spaces, and in recent years has expanded into accelerators, servers, and mobile computing.
In November of 2022, we announced at the RISC-V Summit that we were accepting patches for RISC-V:
The latest update that we have is that now not only are we accepting patches, but we have begun to mature support for RISC-V in Android. RISC-V is a modular ISA, meaning that there are a large number of optional extensions. We have also determined an initial set that we feel is critical to ensure that any CPU running RISC-V will have all of the features we expect to achieve high performance. This set includes the rva22 profile as well as the vector and vector crypto extensions. This update was provided at the RISC-V summit in Europe:
You can build, test, and run the Android support for RISC-V on your own machine as well now! Just like other platform targets in AOSP, you can use the Cuttlefish Virtual Device support:
$ lunch aosp_cf_riscv64_phone-userdebug
$ m -j
$ launch_cvd -cpus=8 -memory_mb=8192
Then, you can use vncviewer to connect to the running device and interact.
At this time, these patches will support building and running a basic Android Open Source Project experience, but are not yet fully optimized. For example, work on a fully optimized backend for the Android Runtime (ART) is still a work in progress. Additionally, AOSP, our external projects, and compilers haven’t generated fully optimized, reduced code that also takes advantage of the latest ratified extensions, such as the one for vectors. However, we believe that it is ready to allow experimentation and collaboration.
Later this year, we expect to have the NDK ABI finalized and canary builds available on Android’s public CI soon and RISC-V on x86-64 & ARM64 available for easier testing of riscv64 Android applications on a host machine. By 2024, the plan is to have emulators available publicly, with a full feature set to test applications for various device form factors! As recently announced in our collaboration with Qualcomm, we expect wearables to be the first form factor available.
However, just porting the Android operating system itself is not enough! We are working with the community and RISE (RISC-V Software Ecosystem). The RISE Project has been established to provide a way to accelerate the availability of software for high-performance and power-efficient RISC-V processor cores running high-level operating systems. That includes not only Android, but also Linux and other operating systems across a variety of application domains, including high-performance computing. The RISE Project includes members from Andes, Google, Intel, Imagination Technologies, MediaTek, Nvidia, Qualcomm Technologies, Red Hat, Rivos, Samsung, SiFive, T-Head, and Ventana.
Google is also continuing and expanding our strong investments at RISC-V International, even beyond our long-standing Premium membership and board participation. We also have many other contributors in key roles on horizontal committees, working groups, and technical committees to ensure that specifications are rapidly being designed and ratified to benefit not only Android but also many other use cases.
Android's support for RISC-V is dependent on a wide range of contributions from toolchain to basic support libraries. We are very appreciative of the ongoing efforts which requires countless projects to support RISC-V build configurations and quality implementations. If you are interested in contributing please visit the following resources:
https://github.com/google/android-riscv64 for detailed information on how to build and test the RISC-V support in Android, list of known issues and opportunities to contribute to AOSP at source.android.com and toolchain projects and support libraries.
Subscribe to RISC-V Android SIG mailing list or join directly, if your organization is a member of RISC-V International to stay tuned in to progress and offer your suggestions and feedback.
Make sure to stay tuned as we look into ways to make it as easy for Android developers writing native to target new platforms as it is for our Java and Kotlin developers!
Android is an open source operating system that is freely available to port to many devices and architectures. As such it supports many different device types and CPU architectures. We’re excited to be adding a new one to that list - RISC-V.
RISC-V is a free and open instruction set architecture (ISA), bringing the same spirit of industry-wide collaboration and innovation that we see in software around open source to the hardware ecosystem. Invented 10 years ago at the University of California, Berkeley, RISC-V has seen rapid adoption in embedded and microcontroller spaces, and in recent years has expanded into accelerators, servers, and mobile computing.
In November of 2022, we announced at the RISC-V Summit that we were accepting patches for RISC-V:
The latest update that we have is that now not only are we accepting patches, but we have begun to mature support for RISC-V in Android. RISC-V is a modular ISA, meaning that there are a large number of optional extensions. We have also determined an initial set that we feel is critical to ensure that any CPU running RISC-V will have all of the features we expect to achieve high performance. This set includes the rva22 profile as well as the vector and vector crypto extensions. This update was provided at the RISC-V summit in Europe:
You can build, test, and run the Android support for RISC-V on your own machine as well now! Just like other platform targets in AOSP, you can use the Cuttlefish Virtual Device support:
$ lunch aosp_cf_riscv64_phone-userdebug
$ m -j
$ launch_cvd -cpus=8 -memory_mb=8192
Then, you can use vncviewer to connect to the running device and interact.
At this time, these patches will support building and running a basic Android Open Source Project experience, but are not yet fully optimized. For example, work on a fully optimized backend for the Android Runtime (ART) is still a work in progress. Additionally, AOSP, our external projects, and compilers haven’t generated fully optimized, reduced code that also takes advantage of the latest ratified extensions, such as the one for vectors. However, we believe that it is ready to allow experimentation and collaboration.
Later this year, we expect to have the NDK ABI finalized and canary builds available on Android’s public CI soon and RISC-V on x86-64 & ARM64 available for easier testing of riscv64 Android applications on a host machine. By 2024, the plan is to have emulators available publicly, with a full feature set to test applications for various device form factors! As recently announced in our collaboration with Qualcomm, we expect wearables to be the first form factor available.
However, just porting the Android operating system itself is not enough! We are working with the community and RISE (RISC-V Software Ecosystem). The RISE Project has been established to provide a way to accelerate the availability of software for high-performance and power-efficient RISC-V processor cores running high-level operating systems. That includes not only Android, but also Linux and other operating systems across a variety of application domains, including high-performance computing. The RISE Project includes members from Andes, Google, Intel, Imagination Technologies, MediaTek, Nvidia, Qualcomm Technologies, Red Hat, Rivos, Samsung, SiFive, T-Head, and Ventana.
Google is also continuing and expanding our strong investments at RISC-V International, even beyond our long-standing Premium membership and board participation. We also have many other contributors in key roles on horizontal committees, working groups, and technical committees to ensure that specifications are rapidly being designed and ratified to benefit not only Android but also many other use cases.
Android's support for RISC-V is dependent on a wide range of contributions from toolchain to basic support libraries. We are very appreciative of the ongoing efforts which requires countless projects to support RISC-V build configurations and quality implementations. If you are interested in contributing please visit the following resources:
https://github.com/google/android-riscv64 for detailed information on how to build and test the RISC-V support in Android, list of known issues and opportunities to contribute to AOSP at source.android.com and toolchain projects and support libraries.
Subscribe to RISC-V Android SIG mailing list or join directly, if your organization is a member of RISC-V International to stay tuned in to progress and offer your suggestions and feedback.
Make sure to stay tuned as we look into ways to make it as easy for Android developers writing native to target new platforms as it is for our Java and Kotlin developers!
Google Fiber is proud to announce Rocco Laurenzano as Chief Operating Officer. In his five and a half years with GFiber, Rocco’s leadership has been instrumental in establishing the operational excellence that has set the stage for our current expansion and growth. Rocco has been serving in the role unofficially for some time now. In his role as Vice President of Operations, he was already overseeing expansion, build, customer operations, and project management.
The results of these efforts have fueled GFiber’s incredible growth over the past few years — creating a construction organization that has almost tripled build volume over the last four years and increased our service footprint by almost 2x over the same period. A key architect of the company’s expansion strategy, Rocco has led our expansion to new states and more fully building out our existing cities. He’ll continue to lead all of these efforts in his new role as COO.
Prior to joining GFiber, Rocco served in senior operations leadership roles at Altice USA, Time Warner Cable, Charter Communications, and Insight Communications.
Rocco with his leadership team
“I’ve had the privilege and pleasure of working with Rocco over many years and in many capacities,” said Dinni Jain, CEO. “What he brings to any team is operational excellence, balanced with a clear appreciation for the people he works with, and the understanding of how to create a culture of accountability and constant improvement with a strong foundation of trust. This is truly a case of the right leader at the right time for a company.”
The problem is that there is a lot of noise in the account creation code, which makes it hard to tell which details are relevant to the assert statement.
But going from one extreme to the other can also make the test hard to follow:
def test_get_balance(self):
account = _create_account()
self.assertEqual(account.GetBalance(), BALANCE)
Now the problem is that critical details are hidden in the _create_account() helper function, so it’s not obvious where the BALANCE field comes from. In order to understand the test, you need to switch context by diving into the helper function.
A good test should include only details relevant to the test, while hiding noise:
def test_get_balance():
account = _create_account(BALANCE)
self.assertEqual(account.GetBalance(), BALANCE)
By following this advice,it should be easy to see the flow of data throughout a test. For example:
It’s National Civics Day, and we’re taking a unique tour inside one of the most famous American structures of all: the White House.“Welcome to the White House” is the fi…